Blog # 19 - Logic Gates (5 of 8 in the Series) Electrical Wiring Diagrams

All digital electronic devices employ switches that perform specific logical operations. These switches, called logic gates, can have anywhere from one to several inputs and (usually) a single output. Logic devices have two states, represented by the digits 0 and 1. The 0 digit is normally called “low” and the 1 digit is called “high.”

Gates are used in everyday (IED’s), Intelligent Electronic Devices, such as computers, microprocessors, smart house devices, metering and relays just to mention a few.

A binary quantity is one that can take on only 2 states. The above is a binary arrangement…a switch in series with a power source and a light. The switch can be open or closed. the light can be either off, or on. We can now assign a binary number to the switch and the light. For the light, On, = 1 or Off = 0. For the switch, Closed = 1 or Open = 0.

In order to analyze these binary arrangements we devise, a truth table.

This is a binary arrangement that has two switches in series with a power source and a light.  Either switch can be, open, or closed...the light will be either, off, or on. As before we can now assign a binary number to the light and the switch.

For the light On = 1, Off = 0. For the switches Closed = 1, Open   = 0.

And in order to analyze these binary arrangements we devise a truth table. The two switches form what is known in logic gate terms as, an “AND” gate. We state its logic in the equation L = S1 AND S2. 

 Here is another binary arrangement with two switches in parallel, which generates this truth table.

The two switches form what is known in logic gate terms, as an “OR” gate.

We state it logically in the equation, L = S1 OR S2. 

 Here is yet another binary arrangement with three switches in series with the truth table shown.

The three switches form what is known in logic gate terms as an “AND” gate.

We state its logic in the equatio, L = S1 AND S2 AND S3. 

 Here is yet another binary arrangement with three switches, this time in parallel. Which generates the truth table shown above.

The three switches form what is known in logic gate terms as an “OR” gate.

We state it logically in the equation L = S1 OR S2 OR S3. 

 Here is yet another binary arrangement with three switches, this time in a combo, series-parallel arrangement.

Which generates the truth table as above.

The logic of these three switches can be described by the equation 

 L = S1 AND (S2 or S3) 

In most solid-state systems (computers etc.), the logic is set up in terms of voltage levels.

0 Volts = “low", logic level (0),

5 Volts = “high", logic level (1).

If we apply 5 volts to the input of the transistor in this circuit, the transistor is in a state of saturation by virtue of the applied input voltage (5 volts) through the two-position switch. Because its saturated, the transistor drops very little voltage between the collector and emitter, resulting in an output voltage of (practically) 0 volts. 

If we were using this circuit to represent binary bits, we would say that the input signal is a binary ”1” and that the output signal is a binary ”0.” Any voltage close to the full supply voltage (measured in reference to ground, of course) is considered a ”1” and a lack of voltage is considered a ”0.” Alternative terms for these voltage levels are high, (the same as a binary ”1”, and low (the same as a binary ”0”). A general term for the representation of a binary bit by a circuit voltage is, logic level.

Moving the switch to the other position, we apply a binary ”0” to the input and receive a binary ”1” at the output, putting the transistor into cut-off. What we’ve created here with a single transistor, is a circuit generally known as a solid-state logic gate or simply a gate. A gate is a special type of amplifier circuit, designed to accept and generate voltage signals corresponding to binary 1’s and 0’s. As such, gates are not intended to be used for amplifying analog signals. Used together, multiple gates may be applied to the task of binary number storage, (memory circuits) or, manipulation, (computer circuits), each gate’s output representing one bit of a multi-bit binary number. Just how this is done is a subject for further study. Right now, it is important to focus on the operation of individual gates.

The gate shown here with the single transistor is known as an inverter, or a NOT gate because its output is the exact opposite of the digital input signal. For convenience, gate circuits are generally represented by their own symbols rather than by their circuit diagrams of transistors and resistors. The above is the symbol for a not gate.

 Remember our series switches circuit. We can now represent this system by the standard 2-input AND gate symbol, with, the same truth table as the two series switch version.

 Remember our three series switches circuit. We can now represent this system by the standard, 3-input AND gate symbol with the truth table which is identical to the three series switch version.

What this truth table means in practical terms is shown in the following sequence of illustrations.

With the 2-input and gate subjected to all possibilities of input logic levels. A Light-Emitting Diode provides a visual indication of the output logic level: 

For an Input of 0 0, the output is 0.

For an Input of 1 0, the output is 0.

For an Input of 0 1, the output is 0.

For an Input of 1 1, the output is 1, red light on.

It is only with all inputs raised to a ”high” logic level that the AND gate’s output goes ”high,” thus energizing the LED for only one out of the four input combination states.

A variation on the idea of the AND gate is called the NAND gate. The word, ”NAND” is a verbal contraction of the words NOT and AND. Essentially, a NAND gate behaves the same as an AND, gate with a NOT, (inverter) gate, connected to the output terminal. To symbolize this output signal inversion, the NAND gate symbol has a bubble on the output line. The truth table for a NAND gate is as one might expect, exactly opposite to that of an AND gate. As with AND gates, NAND gates, are made with more than two inputs. In such cases the same general principle applies:

The output will be, ”low”, (0), if and only if all inputs are ”high”, (1). 

If any input is ”low”, (0), the output will go ”high”, (1).

Our next gate to investigate is the OR gate. It can have any number of inputs. For example, the one on the left has two inputs and another one on the right has three. The truth tables of each are depicted here…These are called OR gates, because: 

The output will be ”low”, (0), if and only if all inputs are ”low”, (0). 

The output will be ”high”, (1), if any of the inputs are ”high”, (1).

The following sequence of illustrations demonstrates the OR gate’s function, with the 2 inputs experiencing all possible logic levels. A Light-Emitting Diode provides a visual indication of the gate’s output logic levels:

For an Input of 0 0, the output is 0.

For an Input of 1 0, the output is 1, red light on.

For an Input of 0 1, the output is 1, red light on.

For an Input of 1 1, the output is 1, red light on.

A condition of any input being raised to a ”high” logic level makes the OR gate’s output go ”high” logic level thus energizing the LED for three out of the four input combination states.

As you might have suspected, there exists an inverted OR gate known as the NOR gate, which is an OR gate with its output inverted just like a NAND gate is an AND gate with an inverted output. NOR gates, like all the other multiple-input gates seen thus far, can be manufactured with more than two inputs. Still, the same logical principle applies.

The output goes ”low”, (0) if any of the inputs are made ”high”, (1).

The output is ”high”, (1), only when all inputs are ”low”, (0).

Another gated function is the Negative AND gate. The Negative AND gate, functions the same as an AND gate, with all its inputs inverted, (connected through NOT gates). In keeping with the standard gate symbol convention, these inverted inputs can be signified by bubbles. Contrary to most peoples’ first instinct, the logical behavior of a Negative AND gate is not the same as a NAND gate. Its truth table, actually, is identical to a NOR gate.

The output goes ”low”, (0), if any of the inputs are made ”high”, (1).

The output is ”high”, (1), only when all inputs are ”low”, (0).

Following the same pattern, a Negative, OR gate functions the same as an OR gate with all its inputs inverted.  In keeping with the standard gate symbol convention, these inverted inputs can be signified by bubbles. 

This function can also be written as these equivalent gate circuits…the behavior and truth table of a Negative OR gate is the same as for a NAND gate.

The Exclusive OR gate.

The last six gate types are all fairly direct variations on three basic functions. AND, OR, and NOT. The Exclusive OR gate, however, is something quite different. The Exclusive OR gate’s output is a ”high”, (1), if the inputs are at different logic levels, either 0 and 1, or 1 and 0. Conversely, the output is a ”low”, (0), if the inputs are at the same logic levels. 

The Exclusive,-OR gate (sometimes called an  XOR gate) has both a symbol and a truth table pattern that is unique.

The equivalent circuit to the exclusive OR gate shown above has the same truth table as an exclusive or gate, therefore this equivalent circuit can be replaced by a single 2-import OR gate. Work it out it's a good exercise.

Finally, our last gate for analysis is the Exclusive-NOR gate, otherwise known as the XNOR gate. It is equivalent to an Exclusive-OR gate with an inverted output. The truth table for this gate is exactly opposite as for the Exclusive,-OR gate. As indicated by the truth table, the purpose of an Exclusive-NOR gate is:

To Output a ”high”, (1), logic level whenever both inputs are at the same logic levels, (either 0 0, or 1 1).

Also to Output a “low”, (0), logic level if the inputs are different.

Gate universality.

NAND and NOR gates possess a special property. They are universal. That is, given enough gates, either type of gate is able to mimic the operation of any other gate type. The ability for a single gate type to be able to mimic any other gate type is one enjoyed only by the NAND and the NOR. In fact, digital control systems have been designed around nothing but NAND or NOR gates, all the necessary logic functions being derived from collections of interconnected NAND’s or, NOR’s.

Let’s have a look at this universality and see how all the basic gate types may be formed using only NAND’s or only NOR’s. As you can see, there are two ways to use a NAND gate as an inverter, and two ways to use a, NOR gate, as an inverter. 

Constructing the AND function.

To make the AND function from NAND gates, all that is needed is an inverter, (a NOT) on the output of a NAND gate. This extra inversion ”cancels out” the first N in NAND, leaving the AND function. 

It takes a little more work to wrestle the same functionality out of NOR gates, but it can be done by running all of the inputs to a NOR gate, thru not gates, which are NOR gates made to function as NOT gates.

We can Construct the NAND function using NOR gates. To make a NOR gate perform the NAND function, we must invert all inputs to the NOR gate, as well as the NOR gate’s output. 

Constructing the OR function.

Inverting the output of a NOR gate, (with another NOR gate connected as an inverter), results in the OR function. The NAND gate, on the other hand, requires an inversion of all inputs to mimic the, OR function, just as we needed to invert all inputs of a NOR gate to obtain the AND function. Remember that inversion of all inputs to a gate results in changing that gate’s essential function. AND to OR (or vice versa), plus an inverted output. Thus, with all inputs inverted, a NAND behaves as an OR. 

A NOR behaves as an AND. 

An AND behaves as a NOR and, 

An OR behaves as a NAND. 

Constructing the NOR function.

Much the same as the procedure for making a NOR gate behave as a NAND, we must invert all inputs and the output to make a NAND gate function as a NOR.